Datasheet

21.8.3 Non-Maskable Interrupt Control
Name: NMICTRL
Offset: 0x02
Reset: 0x00
Property: Write-Protected
Bit 7 6 5 4 3 2 1 0
NMIFILTEN NMISENSE[2:0]
Access
R/W R/W R/W R/W
Reset 0 0 0 0
Bit 3 – NMIFILTEN Non-Maskable Interrupt Filter Enable
Value Description
0
NMI filter is disabled.
1
NMI filter is enabled.
Bits 2:0 – NMISENSE[2:0] Non-Maskable Interrupt Sense
These bits define on which edge or level the NMI triggers.
NMISENSE[2:0] Name Description
0x0 NONE No detection
0x1 RISE Rising-edge detection
0x2 FALL Falling-edge detection
0x3 BOTH Both-edges detection
0x4 HIGH High-level detection
0x5 LOW Low-level detection
0x6-0x7 Reserved
SAM D21 Family
EIC – External Interrupt Controller
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 375