Datasheet

8.2.4.2 Maximum Rise Rate
The rise rate of the power supply must not exceed the values described in Electrical Characteristics.
Refer to the Electrical Characteristics for details.
Related Links
37. Electrical Characteristics
8.3 Power-Up
This section summarizes the power-up sequence of the device. The behavior after power-up is controlled
by the Power Manager. Refer to PM – Power Manager for details.
Related Links
16. PM – Power Manager
8.3.1 Starting of Clocks
After power-up, the device is set to its initial state and kept in reset, until the power has stabilized
throughout the device. Once the power has stabilized, the device will use a 1MHz clock. This clock is
derived from the 8MHz Internal Oscillator (OSC8M), which is divided by eight and used as a clock source
for generic clock generator 0. Generic clock generator 0 is the main clock for the Power Manager (PM).
Some synchronous system clocks are active, allowing software execution.
Refer to the “Clock Mask Register” section in PM – Power Manager for the list of default peripheral clocks
running. Synchronous system clocks that are running are by default not divided and receive a 1MHz clock
through generic clock generator 0. Other generic clocks are disabled except GCLK_WDT, which is used
by the Watchdog Timer (WDT).
Related Links
16. PM – Power Manager
8.3.2 I/O Pins
After power-up, the I/O pins are tri-stated.
8.3.3 Fetching of Initial Instructions
After reset has been released, the CPU starts fetching PC and SP values from the reset address, which
is 0x00000000. This address points to the first executable address in the internal Flash. The code read
from the Internal Flash is free to configure the clock system and clock sources. Refer to PM – Power
Manager, GCLK – Generic Clock Controller and SYSCTRL – System Controller for details. Refer to the
ARM Architecture Reference Manual for more information on CPU startup (http://www.arm.com).
Related Links
16. PM – Power Manager
17. SYSCTRL – System Controller
14. Clock System
8.4 Power-On Reset and Brown-Out Detector
The SAM D21 embeds three features to monitor, warn and/or reset the device:
• POR: Power-On Reset on VDDANA
SAM D21 Family
Power Supply and Start-Up Considerations
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 37