Datasheet

21.6.2 Basic Operation
21.6.2.1 Initialization
The EIC must be initialized in the following order:
1. Enable CLK_EIC_APB
2. If edge detection or filtering is required, GCLK_EIC must be enabled
3. Write the EIC configuration registers (EVCTRL, WAKEUP, CONFIGy)
4. Enable the EIC
To use NMI, GCLK_EIC must be enabled after EIC configuration (NMICTRL).
21.6.2.2 Enabling, Disabling and Resetting
The EIC is enabled by writing a '1' the Enable bit in the Control register (CTRL.ENABLE). The EIC is
disabled by writing CTRL.ENABLE to '0'.
The EIC is reset by setting the Software Reset bit in the Control register (CTRL.SWRST). All registers in
the EIC will be reset to their initial state, and the EIC will be disabled.
Refer to the CTRL register description for details.
21.6.3 External Pin Processing
Each external pin can be configured to generate an interrupt/event on edge detection (rising, falling or
both edges) or level detection (high or low). The sense of external interrupt pins is configured by writing
the Input Sense x bits in the Config n register (CONFIGn.SENSEx). The corresponding interrupt flag
(INTFLAG.EXTINT[x]) in the Interrupt Flag Status and Clear register (INTFLAG) is set when the interrupt
condition is met.
When the interrupt flag has been cleared in edge-sensitive mode, INTFLAG.EXTINT[x] will only be set if a
new interrupt condition is met. In level-sensitive mode, when interrupt has been cleared,
INTFLAG.EXTINT[x] will be set immediately if the EXTINTx pin still matches the interrupt condition.
Each external pin can be filtered by a majority vote filtering, clocked by GCLK_EIC. Filtering is enabled if
bit Filter Enable x in the Configuration n register (CONFIGn.FILTENx) is written to '1'. The majority vote
filter samples the external pin three times with GCLK_EIC and outputs the value when two or more
samples are equal.
Table 21-1. Majority Vote Filter
Samples [0, 1, 2] Filter Output
[0,0,0] 0
[0,0,1] 0
[0,1,0] 0
[0,1,1] 1
[1,0,0] 0
[1,0,1] 1
[1,1,0] 1
[1,1,1] 1
When an external interrupt is configured for level detection, or if filtering is disabled, detection is made
asynchronously, and GCLK_EIC is not required.
SAM D21 Family
EIC – External Interrupt Controller
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 368