Datasheet

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TRIGACT[1:0] Name Description
0x2 BEAT One trigger required for each beat transfer
0x3 TRANSACTION One trigger required for each transaction
Bits 13:8 – TRIGSRC[5:0] Trigger Source
These bits define the peripheral trigger which is source of the transfer. For details on trigger selection and
trigger modes, refer to Transfer Triggers and Actions and CHCTRLB.TRIGACT.
Value Name Description
0x00
DISABLE Only software/event triggers
0x01
SERCOM0 RX SERCOM0 RX Trigger
0x02
SERCOM0 TX SERCOM0 TX Trigger
0x03
SERCOM1 RX SERCOM1 RX Trigger
0x04
SERCOM1 TX SERCOM1 TX Trigger
0x05
SERCOM2 RX SERCOM2 RX Trigger
0x06
SERCOM2 TX SERCOM2 TX Trigger
0x07
SERCOM3 RX SERCOM3 RX Trigger
0x08
SERCOM3 TX SERCOM3 TX Trigger
0x09
SERCOM4 RX SERCOM4 RX Trigger
0x0A
SERCOM4 TX SERCOM4 TX Trigger
0x0B
SERCOM5 RX SERCOM5 RX Trigger
0x0C
SERCOM5 TX SERCOM5 TX Trigger
0x0D
TCC0 OVF TCC0 Overflow Trigger
0x0E
TCC0 MC0 TCC0 Match/Compare 0 Trigger
0x0F
TCC0 MC1 TCC0 Match/Compare 1 Trigger
0x10
TCC0 MC2 TCC0 Match/Compare 2 Trigger
0x11
TCC0 MC3 TCC0 Match/Compare 3 Trigger
0x12
TCC1 OVF TCC1 Overflow Trigger
0x13
TCC1 MC0 TCC1 Match/Compare 0 Trigger
0x14
TCC1 MC1 TCC1 Match/Compare 1 Trigger
0x15
TCC2 OVF TCC2 Overflow Trigger
0x16
TCC2 MC0 TCC2 Match/Compare 0 Trigger
0x17
TCC2 MC1 TCC2 Match/Compare 1 Trigger
0x18
TC3 OVF TC3 Overflow Trigger
0x19
TC3 MC0 TC3 Match/Compare 0 Trigger
0x1A
TC3 MC1 TC3 Match/Compare 1 Trigger
0x1B
TC4 OVF TC4 Overflow Trigger
0x1C
TC4 MC0 TC4 Match/Compare 0 Trigger
0x1D
TC4 MC1 TC4 Match/Compare 1 Trigger
0x1E
TC5 OVF TC5 Overflow Trigger
0x1F
TC5 MC0 TC5 Match/Compare 0 Trigger
0x20
TC5 MC1 TC5 Match/Compare 1 Trigger
0x21
TC6 OVF TC6 Overflow Trigger
0x22
TC6 MC0 TC6 Match/Compare 0 Trigger
0x23
TC6 MC1 TC6 Match/Compare 1 Trigger
0x24
TC7 OVF TC7 Overflow Trigger
SAM D21 Family
DMAC – Direct Memory Access Controller
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 350