Datasheet
20.8.17 Channel ID
Name: CHID
Offset: 0x3F
Reset: 0x00
Property: -
Bit 7 6 5 4 3 2 1 0
ID[3:0]
Access
R/W R/W R/W R/W
Reset 0 0 0 0
Bits 3:0 – ID[3:0] Channel ID
These bits define the channel number that will be affected by the channel registers (CH*). Before reading
or writing a channel register, the channel ID bit group must be written first.
SAM D21 Family
DMAC – Direct Memory Access Controller
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 347