Datasheet

Value Description
0
Static arbitration scheme for channels with level 2 priority.
1
Round-robin arbitration scheme for channels with level 2 priority.
Bits 19:16 – LVLPRI2[3:0] Level 2 Channel Priority Number
When round-robin arbitration is enabled (PRICTRL0.RRLVLEN2=1) for priority level 2, this register holds
the channel number of the last DMA channel being granted access as the active channel with priority
level 2.
When static arbitration is enabled (PRICTRL0.RRLVLEN2=0) for priority level 2, and the value of this bit
group is non-zero, it will not affect the static priority scheme.
This bit group is not reset when round-robin arbitration gets disabled (PRICTRL0.RRLVLEN2 written to
'0').
Bit 15 – RRLVLEN1 Level 1 Round-Robin Scheduling Enable
For details on arbitration schemes, refer to 20.6.2.4 Arbitration.
Value Description
0
Static arbitration scheme for channels with level 1 priority.
1
Round-robin arbitration scheme for channels with level 1 priority.
Bits 11:8 – LVLPRI1[3:0] Level 1 Channel Priority Number
When round-robin arbitration is enabled (PRICTRL0.RRLVLEN1=1) for priority level 1, this register holds
the channel number of the last DMA channel being granted access as the active channel with priority
level 1.
When static arbitration is enabled (PRICTRL0.RRLVLEN1=0) for priority level 1, and the value of this bit
group is non-zero, it will not affect the static priority scheme.
This bit group is not reset when round-robin arbitration gets disabled (PRICTRL0.RRLVLEN1 written to
'0').
Bit 7 – RRLVLEN0 Level 0 Round-Robin Scheduling Enable
For details on arbitration schemes, refer to 20.6.2.4 Arbitration.
Value Description
0
Static arbitration scheme for channels with level 0 priority.
1
Round-robin arbitration scheme for channels with level 0 priority.
Bits 3:0 – LVLPRI0[3:0] Level 0 Channel Priority Number
When round-robin arbitration is enabled (PRICTRL0.RRLVLEN0=1) for priority level 0, this register holds
the channel number of the last DMA channel being granted access as the active channel with priority
level 0.
When static arbitration is enabled (PRICTRL0.RRLVLEN0=0) for priority level 0, and the value of this bit
group is non-zero, it will not affect the static priority scheme.
This bit group is not reset when round-robin arbitration gets disabled (PRICTRL0.RRLVLEN0 written to
'0').
SAM D21 Family
DMAC – Direct Memory Access Controller
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 338