Datasheet

Bit 0 – SWRST Software Reset
Writing a '0' to this bit has no effect.
Writing a '1' to this bit when both the DMAC and the CRC module are disabled (DMAENABLE and
CRCENABLE are '0') resets all registers in the DMAC (except DBGCTRL) to their initial state. If either the
DMAC or CRC module is enabled, the Reset request will be ignored and the DMAC will return an access
error.
Value Description
0
There is no Reset operation ongoing.
1
A Reset operation is ongoing.
SAM D21 Family
DMAC – Direct Memory Access Controller
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 328