Datasheet

20.7 Register Summary
Offset Name Bit Pos.
0x00 CTRL
7:0 CRCENABLE DMAENABLE SWRST
15:8 LVLENx3 LVLENx2 LVLENx1 LVLENx0
0x02 CRCCTRL
7:0 CRCPOLY[1:0] CRCBEATSIZE[1:0]
15:8 CRCSRC[5:0]
0x04 CRCDATAIN
7:0 CRCDATAIN[7:0]
15:8 CRCDATAIN[15:8]
23:16 CRCDATAIN[23:16]
31:24 CRCDATAIN[31:24]
0x08 CRCCHKSUM
7:0 CRCCHKSUM[7:0]
15:8 CRCCHKSUM[15:8]
23:16 CRCCHKSUM[23:16]
31:24 CRCCHKSUM[31:24]
0x0C CRCSTATUS 7:0 CRCZERO CRCBUSY
0x0D DBGCTRL 7:0 DBGRUN
0x0E QOSCTRL 7:0 DQOS[1:0] FQOS[1:0] WRBQOS[1:0]
0x0F Reserved
0x10 SWTRIGCTRL
7:0 SWTRIGn[7:0]
15:8 SWTRIGn[11:8]
23:16
31:24
0x14 PRICTRL0
7:0 RRLVLEN0 LVLPRI0[3:0]
15:8 RRLVLEN1 LVLPRI1[3:0]
23:16 RRLVLEN2 LVLPRI2[3:0]
31:24 RRLVLEN3 LVLPRI3[3:0]
0x18
...
0x1F
Reserved
0x20 INTPEND
7:0 ID[3:0]
15:8 PEND BUSY FERR SUSP TCMPL TERR
0x22
...
0x23
Reserved
0x24 INTSTATUS
7:0 CHINTn[7:0]
15:8 CHINTn[11:8]
23:16
31:24
0x28 BUSYCH
7:0 BUSYCHn[7:0]
15:8 BUSYCHn[11:8]
23:16
31:24
SAM D21 Family
DMAC – Direct Memory Access Controller
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 324