Datasheet

a channel with a lower priority level number. Each priority level x is enabled by setting the corresponding

Priority Level x Enable bit in the Control register (CTRL.LVLENx=1).

Within each priority level the DMAC's arbiter can be configured to prioritize statically or dynamically:

Static Arbitration within a priority level is selected by writing a '0' to the Level x Round-Robin Scheduling

Enable bit in the Priority Control 0 register (PRICTRL0.RRLVLENx).

When static arbitration is selected, the arbiter will prioritize a low channel number over a high channel

number as shown in the figure below. When using the static arbitration there is a risk of high channel

numbers never being granted access as the active channel. This can be avoided using a dynamic

arbitration scheme.

Figure 20-5. Static Priority Scheduling

Highest Channel

Lowest Channel

Highest Priority

Lowest Priority

Channel N

Channel 0

Channel x+1

Channel x

Dynamic Arbitration within a priority level is selected by writing a '1' to PRICTRL0.RRLVLENx.

The dynamic arbitration scheme in the DMAC is round-robin. With the round-robin scheme, the channel

number of the last channel being granted access will have the lowest priority the next time the arbiter has

to grant access to a channel within the same priority level, as shown in Figure 20-6. The channel number

of the last channel being granted access as the active channel is stored in the Level x Channel Priority

Number bit group in the Priority Control 0 register (PRICTRL0.LVLPRIx) for the corresponding priority

level.

SAM D21 Family

DMAC – Direct Memory Access Controller

Datasheet Complete

DS40001882D-page 309