Datasheet

19.8.24 Compare n Value - MODE0
Name: COMP
Offset: 0x18
Reset: 0x00000000
Property: Write-Protected, Write-Synchronized
Bit 31 30 29 28 27 26 25 24
COMP[31:24]
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0 0
Bit 23 22 21 20 19 18 17 16
COMP[23:16]
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0 0
Bit 15 14 13 12 11 10 9 8
COMP[15:8]
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0
COMP[7:0]
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0 0
Bits 31:0 – COMP[31:0] Compare Value
The 32-bit value of COMPn is continuously compared with the 32-bit COUNT value. When a match
occurs, the Compare n interrupt flag in the Interrupt Flag Status and Clear register (INTFLAG.CMPn) is
set on the next counter cycle, and the counter value is cleared if CTRL.MATCHCLR is one.
SAM D21 Family
RTC – Real-Time Counter
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 296