Datasheet

14.3 Register Synchronization
19.6.9 Additional Features
19.6.9.1 Periodic Events
The RTC prescaler can generate events at periodic intervals, allowing flexible system tick creation. Any of
the upper eight bits of the prescaler (bits 2 to 9) can be the source of an event. When one of the eight
Periodic Event Output bits in the Event Control register (EVCTRL.PEREO[n=0..7]) is '1', an event is
generated on the 0-to-1 transition of the related bit in the prescaler, resulting in a periodic event frequency
of:


=

GCLK_RTC
2
 + 3
f
GCLK_RTC
is the frequency of the internal prescaler clock, GCLK_RTC, and n is the position of the
EVCTRL.PEREOn bit. For example, PER0 will generate an event every eight CLK_RTC_OSC cycles,
PER1 every 16 cycles, etc. This is shown in the figure below. Periodic events are independent of the
prescaler setting used by the RTC counter, except if CTRL.PRESCALER is zero. Then, no periodic
events will be generated.
Figure 19-4. Example Periodic Events
PEREO0
PEREO1
PEREO2
PEREO3
PEREO4
GCLK_RTC
19.6.9.2 Frequency Correction
The RTC Frequency Correction module employs periodic counter corrections to compensate for a too-
slow or too-fast oscillator. Frequency correction requires that CTRL.PRESCALER is greater than 1.
The digital correction circuit adds or subtracts cycles from the RTC prescaler to adjust the frequency in
approximately 1 ppm steps. Digital correction is achieved by adding or skipping a single count in the
prescaler once every 4096 GCLK_RTC_OSC cycles. The Value bit group in the Frequency Correction
register (FREQCORR.VALUE) determines the number of times the adjustment is applied over 240 of
these periods. The resulting correction is as follows:
Correction in ppm = (FREQCORR.VALUE / 4096 * 240) * 10
6ppm
This results in a resolution of 1.017 PPM.
The Sign bit in the Frequency Correction register (FREQCORR.SIGN) determines the direction of the
correction. A positive value will add counts and increase the period (reducing the frequency), and a
negative value will reduce counts per period (speeding up the frequency). Digital correction also affects
the generation of the periodic events from the prescaler. When the correction is applied at the end of the
correction cycle period, the interval between the previous periodic event and the next occurrence may
also be shortened or lengthened depending on the correction value.
SAM D21 Family
RTC – Real-Time Counter
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 264