Datasheet

18.8.8 Clear
Name: CLEAR
Offset: 0x8
Reset: 0x00
Property: Write-Protected, Write-Synchronized
Bit 7 6 5 4 3 2 1 0
CLEAR[7:0]
Access
W W W W W W W W
Reset 0 0 0 0 0 0 0 0
Bits 7:0 – CLEAR[7:0] Watchdog Clear
Writing 0xA5 to this register will clear the Watchdog Timer and the watchdog time-out period is restarted.
Writing any other value will issue an immediate system reset.
SAM D21 Family
WDT – Watchdog Timer
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 255