Datasheet

18.8.6 Interrupt Flag Status and Clear
Name: INTFLAG
Offset: 0x6
Reset: 0x00
Property: –
Bit 7 6 5 4 3 2 1 0
EW
Access
R/W
Reset 0
Bit 0 – EW Early Warning
This flag is set when an Early Warning interrupt occurs, as defined by the EWOFFSET bit group in
EWCTRL.
Writing a zero to this bit has no effect.
Writing a one to this bit clears the Early Warning interrupt flag.
SAM D21 Family
WDT – Watchdog Timer
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 253