Datasheet

18.8.4 Interrupt Enable Clear
Name: INTENCLR
Offset: 0x4
Reset: 0x00
Property: Write-Protected
Bit 7 6 5 4 3 2 1 0
EW
Access
R/W
Reset 0
Bit 0 – EW Early Warning Interrupt Enable
Writing a zero to this bit has no effect.
Writing a one to this bit disables the Early Warning interrupt.
Value Description
0
The Early Warning interrupt is disabled.
1
The Early Warning interrupt is enabled.
SAM D21 Family
WDT – Watchdog Timer
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 251