Datasheet

17.8.14 3.3V Brown-Out Detector (BOD33) Control
Name: BOD33
Offset: 0x34
Reset: 0x00XX00XX
Property: Write-Protected, Write-Synchronized
Bit 31 30 29 28 27 26 25 24
Access
Reset
Bit 23 22 21 20 19 18 17 16
LEVEL[5:0]
Access
R/W R/W R/W R/W R/W R/W
Reset x x x x x x
Bit 15 14 13 12 11 10 9 8
PSEL[3:0] CEN MODE
Access
R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0
RUNSTDBY ACTION[1:0] HYST ENABLE
Access
R/W R/W R/W R/W R/W
Reset 0 x x x x
Bits 21:16 – LEVEL[5:0] BOD33 Threshold Level
This field sets the triggering voltage threshold for the BOD33. See the Electrical Characteristics for actual
voltage levels. Note that any change to the LEVEL field of the BOD33 register should be done when the
BOD33 is disabled in order to avoid spurious resets or interrupts.
These bits are loaded from Flash User Row at start-up. Refer to NVM User Row Mapping for more
details.
Bits 15:12 – PSEL[3:0] Prescaler Select
Selects the prescaler divide-by output for the BOD33 sampling mode according to the table below. The
input clock comes from the OSCULP32K 1kHz output.
PSEL[3:0] Name Description
0x0 DIV2 Divide clock by 2
0x1 DIV4 Divide clock by 4
0x2 DIV8 Divide clock by 8
0x3 DIV16 Divide clock by 16
0x4 DIV32 Divide clock by 32
0x5 DIV64 Divide clock by 64
SAM D21 Family
SYSCTRL – System Controller
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 227