Datasheet

17.8.6 32kHz External Crystal Oscillator (XOSC32K) Control
Name: XOSC32K
Offset: 0x14
Reset: 0x0080
Property: Write-Protected
Bit 15 14 13 12 11 10 9 8
WRTLOCK STARTUP[2:0]
Access
R/W R/W R/W R/W
Reset 0 0 0 0
Bit 7 6 5 4 3 2 1 0
ONDEMAND RUNSTDBY AAMPEN EN32K XTALEN ENABLE
Access
R/W R/W R/W R/W R/W R/W
Reset 1 0 0 0 0 0
Bit 12 – WRTLOCK Write Lock
This bit locks the XOSC32K register for future writes to fix the XOSC32K configuration.
Value Description
0
The XOSC32K configuration is not locked.
1
The XOSC32K configuration is locked.
Bits 10:8 – STARTUP[2:0] Oscillator Start-Up Time
These bits select the start-up time for the oscillator.
The OSCULP32K oscillator is used to clock the start-up counter.
Table 17-6. Start-Up Time for 32kHz External Crystal Oscillator
STARTUP[2:0] Number of OSCULP32K
Clock Cycles
Number of XOSC32K
Clock Cycles
Approximate Equivalent
Time
(OSCULP = 32kHz)
(1)(2)(3)
0x0 1 3 122μs
0x1 32 3 1068μs
0x2 2048 3 62592μs
0x3 4096 3 125092μs
0x4 16384 3 500092μs
0x5 32768 3 1000092μs
0x6 65536 3 2000092μs
0x7 131072 3 4000092μs
Notes: 1. Number of cycles for the start-up counter.
2. Number of cycles for the synchronization delay, before PCLKSR.XOSC32KRDY is set.
SAM D21 Family
SYSCTRL – System Controller
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 213