Datasheet

Bit 2 – OSC32KRDY OSC32K Ready Interrupt Enable
Writing a zero to this bit has no effect.
Writing a one to this bit will clear the OSC32K Ready Interrupt Enable bit, which disables the OSC32K
Ready interrupt.
Value Description
0
The OSC32K Ready interrupt is disabled.
1
The OSC32K Ready interrupt is enabled, and an interrupt request will be generated when
the OSC32K Ready Interrupt flag is set.
Bit 1 – XOSC32KRDY XOSC32K Ready Interrupt Enable
Writing a zero to this bit has no effect.
Writing a one to this bit will clear the XOSC32K Ready Interrupt Enable bit, which disables the XOSC32K
Ready interrupt.
Value Description
0
The XOSC32K Ready interrupt is disabled.
1
The XOSC32K Ready interrupt is enabled, and an interrupt request will be generated when
the XOSC32K Ready Interrupt flag is set.
Bit 0 – XOSCRDY XOSC Ready Interrupt Enable
Writing a zero to this bit has no effect.
Writing a one to this bit will clear the XOSC Ready Interrupt Enable bit, which disables the XOSC Ready
interrupt.
Value Description
0
The XOSC Ready interrupt is disabled.
1
The XOSC Ready interrupt is enabled, and an interrupt request will be generated when the
XOSC Ready Interrupt flag is set.
SAM D21 Family
SYSCTRL – System Controller
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 198