Datasheet

17.6.9.2 Continuous Mode
When the BOD33 Mode bit (BOD33.MODE) in the BOD33 register is written to zero and the BOD33 is
enabled, the BOD33 operates in continuous mode. In this mode, the BOD33 is continuously monitoring
the VDDANA supply voltage.
Continuous mode is the default mode for BOD33.
17.6.9.3 Sampling Mode
The sampling mode is a low-power mode where the BOD33 or BOD12 is being repeatedly enabled on a
sampling clock’s ticks. The BOD33 or BOD12 will monitor the supply voltage for a short period of time
and then go to a low-power disabled state until the next sampling clock tick.
Sampling mode is enabled by writing one to BOD33.MODE for BOD33, and by writing one to
BOD12.MODE for BOD12. The frequency of the clock ticks (F
clksampling
) is controlled by the BOD33
Prescaler Select bit group (BOD33.PSEL) in the BOD33 register and Prescaler Select bit
group(BOD12.PSEL) in the BOD12 BOD12 register for BOD33 and BOD12, respectively.

clksampling
=

clkprescaler
2
PSEL+1
The prescaler signal (F
clkprescaler
) is a 1kHz clock, output from the32kHz Ultra Low Power Oscillator,
OSCULP32K.
As the sampling mode clock is different from the APB clock domain, synchronization among the clocks is
necessary. The next figure shows a block diagram of the sampling mode. The BOD33 and BOD12
Synchronization Ready bits (PCLKSR.B33SRDY and PCLKSR.B12SRDY, respectively) in the Power and
Clocks Status register show the synchronization ready status of the synchronizer. Writing attempts to the
BOD33 register are ignored while PCLKSR.B33SRDY is zero. Writing attempts to the BOD12 register are
ignored while PCLKSR.B12SRDY is zero.
Figure 17-7. Sampling Mode Block diagram
US
ER INTERFA
CE
R
E
G
I
S
TER
S
(
APB clock domain
)
P
RE
SC
ALE
R
(
clk_prescale
r
domain
)
S
YN
C
HR
O
NIZER
P
S
EL
C
EN
MO
DE
ENABL
E
C
LK_APB
C
LK_PRE
SC
ALER
C
LK
_
SAMPLIN
G
The BOD33 Clock Enable bit (BOD33.CEN) in the BOD33 register and the BOD12 Clock Enable bit
(BOD12.CEN) in the BOD12 register should always be disabled before changing the prescaler value. To
change the prescaler value for the BOD33 or BOD12 during sampling mode, the following steps need to
be taken:
1. Wait until the PCLKSR.B33SRDY bit or the PCLKSR.B12SRDY bit is set.
2. Write the selected value to the BOD33.PSEL or BOD12.PSEL bit group.
17.6.9.4 Hysteresis
The hysteresis functionality can be used in both continuous and sampling mode. Writing a one to the
BOD33 Hysteresis bit (BOD33.HYST) in the BOD33 register will add hysteresis to the BOD33 threshold
SAM D21 Family
SYSCTRL – System Controller
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 188