Datasheet

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XOSC.RUNSTDBY XOSC.ONDEMAND XOSC.ENABLE Sleep Behavior
0 0 1 Always run in IDLE sleep modes. Disabled
in STANDBY sleep mode.
0 1 1 Only run in IDLE sleep modes if requested
by a peripheral. Disabled in STANDBY
sleep mode.
1 0 1 Always run in IDLE and STANDBY sleep
modes.
1 1 1 Only run in IDLE or STANDBY sleep
modes if requested by a peripheral.
After a hard reset, or when waking up from a sleep mode where the XOSC was disabled, the XOSC will
need a certain amount of time to stabilize on the correct frequency. This start-up time can be configured
by changing the Oscillator Start-Up Time bit group (XOSC.STARTUP) in the External Multipurpose
Crystal Oscillator Control register. During the start-up time, the oscillator output is masked to ensure that
no unstable clock propagates to the digital logic. The External Multipurpose Crystal Oscillator Ready bit in
the Power and Clock Status register (PCLKSR.XOSCRDY) is set when the user-selected start-up time is
over. An interrupt is generated on a zero-to-one transition on PCLKSR.XOSCRDY if the External
Multipurpose Crystal Oscillator Ready bit in the Interrupt Enable Set register (INTENSET.XOSCRDY) is
set.
Note: Do not enter standby mode when an oscillator is in start-up:
Wait for the OSCxRDY bit in SYSCTRL.PCLKSR register to be set before going into standby mode.
Related Links
15. GCLK - Generic Clock Controller
17.6.3 32kHz External Crystal Oscillator (XOSC32K) Operation
The XOSC32K can operate in two different modes:
• External clock, with an external clock signal connected to XIN32
• Crystal oscillator, with an external 32.768kHz crystal connected between XIN32 and XOUT32
The XOSC32K can be used as a source for generic clock generators, as described in the GCLK –
Generic Clock Controller.
At Power-on Reset (POR) the XOSC32K is disabled, and the XIN32/XOUT32 pins can be used as
General Purpose I/O (GPIO) pins or by other peripherals in the system. When XOSC32K is enabled, the
operating mode determines the GPIO usage. When in crystal oscillator mode, XIN32 and XOUT32 are
controlled by the SYSCTRL, and GPIO functions are overridden on both pins. When in external clock
mode, only the XIN32 pin will be overridden and controlled by the SYSCTRL, while the XOUT32 pin can
still be used as a GPIO pin.
The external clock or crystal oscillator is enabled by writing a one to the Enable bit (XOSC32K.ENABLE)
in the 32kHz External Crystal Oscillator Control register. To enable the XOSC32K as a crystal oscillator, a
one must be written to the XTAL Enable bit (XOSC32K.XTALEN). If XOSC32K.XTALEN is zero, external
clock input will be enabled.
The oscillator is disabled by writing a zero to the Enable bit (XOSC32K.ENABLE) in the 32kHz External
Crystal Oscillator Control register while keeping the other bits unchanged. Writing to the
SAM D21 Family
SYSCTRL – System Controller
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 178