Datasheet

16.8.9 APBB Mask
Name: APBBMASK
Offset: 0x1C
Reset: 0x0000007F
Property: Write-Protected
Bit 31 30 29 28 27 26 25 24
Access
Reset
Bit 23 22 21 20 19 18 17 16
Access
Reset
Bit 15 14 13 12 11 10 9 8
Access
Reset
Bit 7 6 5 4 3 2 1 0
USB DMAC PORT NVMCTRL DSU PAC1
Access
R/W R/W R/W R/W R/W R/W
Reset 1 1 1 1 1 1
Bit 5 – USB USB APB Clock Enable
Value Description
0
The APBB clock for the USB is stopped.
1
The APBB clock for the USB is enabled.
Bit 4 – DMAC DMAC APB Clock Enable
Value Description
0
The APBB clock for the DMAC is stopped.
1
The APBB clock for the DMAC is enabled.
Bit 3 – PORT PORT APB Clock Enable
Value Description
0
The APBB clock for the PORT is stopped.
1
The APBB clock for the PORT is enabled.
Bit 2 – NVMCTRL NVMCTRL APB Clock Enable
Value Description
0
The APBB clock for the NVMCTRL is stopped.
1
The APBB clock for the NVMCTRL is enabled.
SAM D21 Family
PM – Power Manager
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 162