Datasheet

16.8.8 APBA Mask
Name: APBAMASK
Offset: 0x18
Reset: 0x0000007F
Property: Write-Protected
Bit 31 30 29 28 27 26 25 24
Access
Reset
Bit 23 22 21 20 19 18 17 16
Access
Reset
Bit 15 14 13 12 11 10 9 8
Access
Reset
Bit 7 6 5 4 3 2 1 0
EIC RTC WDT GCLK SYSCTRL PM PAC0
Access
R/W R/W R/W R/W R/W R/W R/W
Reset 1 1 1 1 1 1 1
Bit 6 – EIC EIC APB Clock Enable
Value Description
0
The APBA clock for the EIC is stopped.
1
The APBA clock for the EIC is enabled.
Bit 5 – RTC RTC APB Clock Enable
Value Description
0
The APBA clock for the RTC is stopped.
1
The APBA clock for the RTC is enabled.
Bit 4 – WDT WDT APB Clock Enable
Value Description
0
The APBA clock for the WDT is stopped.
1
The APBA clock for the WDT is enabled.
Bit 3 – GCLK GCLK APB Clock Enable
Value Description
0
The APBA clock for the GCLK is stopped.
1
The APBA clock for the GCLK is enabled.
SAM D21 Family
PM – Power Manager
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 160