Datasheet

16.3 Block Diagram
Figure 16-1. PM Block Diagram
SYNCHRONOUS
CLOCK CONTROLLER
SLEEP MODE
CONTROLLER
RESET
CONTROLLER
CPU
BOD12
BOD33
POR
WDT
GCLK
RESET SOURCES
PERIPHERALS
RESET
CLK_APB
CLK_AHB
CLK_CPU
USER RESET
POWER RESET
POWER MANAGER
CPU
16.4 Signal Description
Signal Name Type Description
RESET Digital input External reset
Refer to I/O Multiplexing and Considerations for details on the pin mapping for this peripheral. One signal
can be mapped on several pins.
Related Links
7. I/O Multiplexing and Considerations
16.5 Product Dependencies
In order to use this peripheral, other parts of the system must be configured correctly, as described below.
16.5.1 I/O Lines
Not applicable.
16.5.2 Power Management
Not applicable.
SAM D21 Family
PM – Power Manager
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 140