Datasheet

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GEN[3:0] Name Description
0x6 GCLKGEN6 Generic clock generator 6
0x7 GCLKGEN7 Generic clock generator 7
0x8 GCLKGEN8 Generic clock generator 8
0x9-0xF - Reserved
Bits 5:0 – ID[5:0] Generic Clock Selection ID
These bits select the generic clock that will be configured. The value of the ID bit group versus module
instance is shown in the table below.
A Power Reset will reset the CLKCTRL register for all IDs, including the RTC. If the WRTLOCK bit of the
corresponding ID is zero and the ID is not the RTC, a user Reset will reset the CLKCTRL register for this
ID.
After a Power Reset, the Reset value of the CLKCTRL register versus module instance is as shown in the
next table.
Table 15-3. Generic Clock Selection ID and CLKCTRL Value after Power Reset
Module Instance Reset Value after Power Reset
CLKCTRL.GEN CLKCTRL.CLKEN CLKCTRL.WRTLOCK
RTC 0x00 0x00 0x00
WDT 0x02 0x01 if WDT Enable bit in NVM
User Row written to one
0x00 if WDT Enable bit in NVM
User Row written to zero
0x01 if WDT Always-On bit in
NVM User Row written to one
0x00 if WDT Always-On bit in
NVM User Row written to zero
Others 0x00 0x00 0x00
After a user Reset, the Reset value of the CLKCTRL register versus module instance is as shown in the
table below.
Table 15-4. Generic Clock Selection ID and CLKCTRL Value after User Reset
Module
Instance
Reset Value after a User Reset
CLKCTRL.GEN CLCTRL.CLKEN CLKCTRL.WRTLOCK
RTC 0x00 if WRTLOCK=0 and
CLKEN=0
No change if WRTLOCK=1
or CLKEN=1
0x00 if WRTLOCK=0 and CLKEN=0
No change if WRTLOCK=1 or
CLKEN=1
No change
SAM D21 Family
GCLK - Generic Clock Controller
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 129