Datasheet

15.8.3 Generic Clock Control
Name: CLKCTRL
Offset: 0x2
Reset: 0x0000
Property: Write-Protected
Bit 15 14 13 12 11 10 9 8
WRTLOCK CLKEN GEN[3:0]
Access
R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0
ID[5:0]
Access
R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0
Bit 15 – WRTLOCK Write Lock
When this bit is written, it will lock from further writes the generic clock pointed to by CLKCTRL.ID, the
generic clock generator pointed to in CLKCTRL.GEN and the division factor used in the generic clock
generator. It can only be unlocked by a Power Reset.
One exception to this is generic clock generator 0, which cannot be locked.
Value Description
0
The generic clock and the associated generic clock generator and division factor are not
locked
1
The generic clock and the associated generic clock generator and division factor are locked
Bit 14 – CLKEN Clock Enable
This bit is used to enable and disable a generic clock.
Value Description
0
The generic clock is disabled
1
The generic clock is enabled
Bits 11:8 – GEN[3:0] Generic Clock Generator
Table 15-2. Generic Clock Generator
GEN[3:0] Name Description
0x0 GCLKGEN0 Generic clock generator 0
0x1 GCLKGEN1 Generic clock generator 1
0x2 GCLKGEN2 Generic clock generator 2
0x3 GCLKGEN3 Generic clock generator 3
0x4 GCLKGEN4 Generic clock generator 4
0x5 GCLKGEN5 Generic clock generator 5
SAM D21 Family
GCLK - Generic Clock Controller
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 128