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15.6.3.4 Configuration Lock

The generic clock configuration can be locked for further write accesses by setting the Write Lock bit in

the CLKCTRL register (CLKCTRL.WRTLOCK). All writes to the CLKCTRL register will be ignored. It can

only be unlocked by a Power Reset.

The Generator source of a locked generic clock are also locked, too: The corresponding GENCTRL and

GENDIV are locked, and can be unlocked only by a Power Reset.

There is one exception concerning the GCLKGEN[0]. As it is used as GCLK_MAIN, it can not be locked.

It is reset by any Reset and will start up in a known configuration. The software reset (CTRL.SWRST) can

not unlock the registers.

15.6.4 Additional Features

15.6.4.1 Indirect Access

The Generic Clock Generator Control and Division registers (GENCTRL and GENDIV) and the Generic

Clock Control register (CLKCTRL) are indirectly addressed as shown in the next figure.

Figure 15-5. GCLK Indirect Access

GENCTRL

GENDIV

CLKCTRL

GENCTRL.ID=i

GENDIV.ID=i

CLKCTRL.ID=j

User Interface

GENCTRL

GENDIV

Generic Clock Generator [i]

CLKCTRL

Generic Clock[j]

Writing these registers is done by setting the corresponding ID bit group. To read a register, the user must

write the ID of the channel, i, in the corresponding register. The value of the register for the corresponding

ID is available in the user interface by a read access.

For example, the sequence to read the GENCTRL register of generic clock generator i is:

1. Do an 8-bit write of the i value to GENCTRL.ID

2. Read the value of GENCTRL

15.6.4.2 Generic Clock Enable after Reset

The Generic Clock Controller must be able to provide a generic clock to some specific peripherals after a

reset. That means that the configuration of the Generators and generic clocks after Reset is device-

dependent.

Refer to GENCTRL.ID for details on GENCTRL reset.

Refer to GENDIV.ID for details on GENDIV reset.

Refer to CLKCTRL.ID for details on CLKCTRL reset.