Datasheet

15.6.2.9 Generic Clock Output on I/O Pins
Each Generator's output can be directed to a GCLK_IO pin. If the Output Enable bit in GENCTRL is '1'
(GENCTRL.OE=1) and the Generator is enabled (GENCTRL.GENEN=1), the Generator requests its
clock source and the GCLKGEN clock is output to a GCLK_IO pin. If GENCTRL.OE=0, GCLK_IO is set
according to the Output Off Value bit. If the Output Off Value bit in GENCTRL (GENCTRL.OOV) is zero,
the output clock will be low when generic clock generator is turned off. If GENCTRL.OOV=1, the output
clock will be high when Generator is turned off.
In standby mode, if the clock is output (GENCTRL.OE=1), the clock on the GCLK_IO pin is frozen to the
OOV value if the Run In Standby bit in GENCTRL (GENCTRL.RUNSTDBY) is zero. If
GENCTRL.RUNSTDBY=1, the GCLKGEN clock is kept running and output to GCLK_IO.
15.6.3 Generic Clock
Figure 15-4. Generic Clock Multiplexer
Clock
Gate
GCLK_PERIPHERAL
CLKCTRL.GEN
CLKCTRL.CLKEN
GCLKGEN[0]
GCLKGEN[1]
GCLKGEN[2]
GCLKGEN[n]
15.6.3.1 Enabling a Generic Clock
Before a generic clock is enabled, one of the Generators must be selected as the source for the generic
clock by writing to CLKCTRL.GEN. The clock source selection is individually set for each generic clock.
When a Generator has been selected, the generic clock is enabled by setting the Clock Enable bit in
CLKCTRL (CLKCTRL.CLKEN=1). The CLKCTRL.CLKEN bit must be synchronized to the generic clock
domain. CLKCTRL.CLKEN will continue to read as its previous state until the synchronization is
complete.
15.6.3.2 Disabling a Generic Clock
A generic clock is disabled by writing CLKCTRL.CLKEN=0. The SYNCBUSY bit will be cleared when this
write-synchronization is complete. CLKCTRL.CLKEN will stay in its previous state until the
synchronization is complete. The generic clock is gated when disabled.
15.6.3.3 Selecting a Clock Source for the Generic Clock
When changing a generic clock source by writing to CLKCTRL.GEN, the generic clock must be disabled
before being re-enabled with the new clock source setting. This prevents glitches during the transition:
1. Write CLKCTRL.CLKEN=0
2. Assert that CLKCTRL.CLKEN reads '0'
3. Change the source of the generic clock by writing CLKCTRL.GEN
4. Re-enable the generic clock by writing CLKCTRL.CLKEN=1
SAM D21 Family
GCLK - Generic Clock Controller
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 122