Datasheet

Updated V
DD
max from 3.63V to 3.63V in 37.3 Absolute Maximum Ratings.
Updated VDDIN pin from 57 to 56 in 7.2.4 GPIO Clusters.
37.7 Power Consumption: Updated Max values for STANDBY from 190.6μA and 197.3μA to 100μA in
Table 37-8.
Added 37.8 Peripheral Power Consumption.
37.9 I/O Pin Characteristics: tRISE and tFALL updated with different load conditions depending on the
DVRSTR value in .
37.9 I/O Pin Characteristics: Correct typo IOL and IOH Max values inverted between
PORT.PINCFG.DRVSTR=0 and 1, tRISE and tFALL updated with different load conditions depending
on the DVRSTR value in Table 37-15.
37.11 Analog Characteristics: Removed note from Table 37-19.
37.11.4 Analog-to-Digital (ADC) characteristics: Added Max DC supply current (I
DD
), R
SAMPLE
maximum value changed from 2.8kW to 3.5kW, Conversion time Typ value change to Min Value in
Table 37-24.
37.11.5 Digital to Analog Converter (DAC) Characteristics: Added Max DC supply current (I
DD
) in Table
37-32.
37.11.6 Analog Comparator Characteristics: Added Min and Max values for VSCALE INL, DNL, Offset
Error and Gain Error in Table 37-36.
37.11.7 Internal 1.1V Bandgap Reference Characteristics: Added Min and Max values, removed
accuracy row in Table 37-38.
37.16.3 SERCOM in I2C Mode Timing: Add Typical values for t
R
in Table 37-68.
Removed Asynchronous Watchdog Clock Characterization.
37.13.4 32.768kHz Internal oscillator (OSC32K) Characteristics: Added Max current consumption
(I
OSC32K
) in Table 37-55.
Updated Crystal Oscillator Characteristics (XOSC32K) ESR maximum values, 37.13.2.1.1 Crystal
Oscillator Characteristics.
Updated Crystal Oscillator Characteristics (XOSC) ESR maximum value, 37.13.1.2 Crystal Oscillator
Characteristics from 348kΩ to 141kΩ.
37.13.3 Digital Frequency Locked Loop (DFLL48M) Characteristics: Updated presentation, now
separating between Open- and Closed Loop Modes. Added f
REF
Min and Max values to Table 37-52.
Updated typical Startup time ( t
STARTUP
) from 6.1µs to 8µs in Table 37-53.
Updated typical Fine lock time (t
LFINE
) from 700µs to 600µs in Table 37-53.
37.13.7 Fractional Digital Phase Locked Loop (FDPLL96M) Characteristics: Added Current
consumption (I
FDPLL96M
), Period Jitter (Jp), Lock time (t
LOCK
), Duty cycles parameters in Table 37-58.
Added 37.15 USB Characteristics.
37.16 Timing Characteristics: Added SCK period (t
SCK
) Typ value in Table 37-65.
Errata
Errata for revision B added.
SAM D21 Family
Data Sheet Revision History
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 1196