Datasheet

Added figure Figure 16-2.
Register Summary:
Removed CFD bit from INTENCLR, INTENSET and INTFLAG.
Added PTC bit to APBCMASK register.
Register Description:
AHB Mask register (AHBMASK): Full bit names updated.
APBC Mask register (APBCMASK.PTC): Added PTC to bit 19.
CFD bit removed from INTENCLR, INTENSET and INTFLAG.
17. SYSCTRL – System Controller
Updated description of 17.6.6 8MHz Internal Oscillator (OSC8M) Operation.
FDPLL96M section reorganized and more integrated in the SYSCTRL chapter: Features, Signal
Description and Product Dependencies sub sections removed and integrated with the corresponding
sections in SYSCTRL.
Register Summary: Added VREG register on address 0x3C - 0x3D.
Register Description:
Updated reset values in OSC8M.
Updated CALIB[11:0] bit description in OSC8M.
Updated LBYPASS bit description in DPLLCTRLB.
18. WDT – Watchdog Timer
Updated description in 18.6.1 Principle of Operation: Introducing the bits used in Table 18-1.
Updated description in 18.6.2.1 Initialization.
Updated description in 18.6.2.4 Normal Mode.
Updated description in 18.6.2.5 Window Mode.
Updated description in 18.6.4 Interrupts.
WEN bit description in the Control register (CTRL.WEN) updated with information on enable-protection.
19. RTC – Real-Time Counter
19.6.9.1 Periodic Events: Bit names updated fro, PERx to PEREOx in example, Figure 19-4.
CLOCK.HOUR[4:0]: Updated Table 19-4
Mode 0 and Mode 2: CMPx bit renamed to CMP0 since only one CMP0 is available.
Bit description of CLOCK.HOUR[4:0]: Updated Table 19-4
ALARMn register renamed to ALARM0.
20. DMAC – Direct Memory Access Controller
Updated block diagram, 20.3 Block Diagram.
General updated description.
21. EIC – External Interrupt Controller
SAM D21 Family
Data Sheet Revision History
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 1192