Datasheet

Errata
Errata for revision C and E added.
45.18 Rev. B – 07/2014
General:
Introduced the new product family name: Atmel | SMART
Removed references to Clock Failure Detection.
Sub sections within chapters might been moved to other location within the chapter.
Typo corrections.
2. Configuration Summary
Added 32KB Flash and 4KB SRAM options to SAM D21J and SAM D21G.
3. Ordering Information(1)
Added Tray to Carrier Type option for SAM D21E, SAMD 21G and SAMD21J ordering codes.
7. I/O Multiplexing and Considerations:
Updated REF function on PA03 and PA04 in Table 7-1:
PA03: DAC/VREFP changed to DAC/VREFA.
PA04: ADC VREFP changed to ADC/VREFB.
Updated COM function on PA30 and PA31:
PA30: CORTEX_M0P/SWCLK changed to SWCKL.
PA31: Added SWDIO.
10. Memories
Added a second note to Table 10-2.
Added Figure 10-1 Calibration and Auxiliary Space.
Added default values for fuses in Table 10-4 NVM User Row Mapping.
11. Processor And Architecture
MTB renamed from “Memory Trace Buffer” to “Micro Trace Buffer”.
13. DSU - Device Service Unit
Updated description of 13.11.3.1 Starting CRC32 Calculation.
Updated title of Table 13-6.
Added Device Selection table to Device Selection bit description the Device Identification register
(DID.DEVSEL).
15. GCLK - Generic Clock Controller
Signal names updated in Device Clocking Diagram, 15.3 Block Diagram.
16. PM – Power Manager
SAM D21 Family
Data Sheet Revision History
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