Datasheet

Register Summary: Remove INTENCLR.SYNCRDY. Add MC0 (located in bit 0) for
INTENSET and INTFLAG, and left shift MC1, MC2 and MC3 for one bit. Therefore,
MC0/1/2/3 are located in bit 0/1/2/3.
37. Electrical Characteristics
Updated unit from 's' to 'us' in the following tables:
• Table 39-11
• Table 39-12
• Table 39-24
• Table 39-25
• Table 39-37
• Table 39-38
• Table 39-39
• Table 39-40
• Table 39-45
• Table 39-46
• Table 39-47
• Table 39-48
Update value and condition for Table 39-39 and Table 39-40
41. Packaging Information
Updated section 41.1.10 32 pin QFN.
45.12 Rev. H – 01/2016
20. DMAC – Direct Memory Access Controller
Updated bit description of the PRICTRL0.LVLPRIn [n=3..0].
22. NVMCTRL – Nonvolatile Memory Controller
Updated description in 22.6.4.3 NVM Write: Removed reference to default NWM
CTRLB.MANW default value.
Updated reset value for CTRLB.MANW from 0 to 1. Note that this change is only
applicable for Device Variant B. Device Variant A will continue to have MANW bit reset
value 0.
Updated reset value of the CTRLB register from 0x00000000 to 0x00000080.
Note that this change is change is only applicable for Device Variant B. Device Variant A
will continue to have CTRLB register reset value 0x00000000.
13. DSU - Device Service Unit
Bit CTRL.CRC is write-only.
32. USB – Universal Serial Bus:
SAM D21 Family
Data Sheet Revision History
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 1186