Datasheet

Figure 42-13. 20-pin IDC JTAG Connector
1
VCC
NC
NC
SWDIO
SWDCLK
NC
NC
nRESET
NC
NC
NC
GND
GND
GND
GND
GND
GND*
GND*
GND*
GND*
20-pin IDC JTAG Connector
GND
SWDIO
SWCLK
RESET
V
DD
Table 42-12. 20-pin IDC JTAG Connector
Header Signal Name Description
SWDCLK Serial wire clock pin
SWDIO Serial wire bidirectional data pin
RESET Target device reset pin, active low
VCC Target voltage sense, should be connected to the device V
DD
GND Ground
GND* These pins are reserved for firmware extension purposes. They can be left open
or connected to GND in normal debug environment. They are not essential for
SWD in general.
42.8 USB Interface
The USB interface consists of a differential data pair (D+/D-) and a power supply (VBUS, GND). Refer to
the Electrical Characteristics for operating voltages which will allow USB operation.
SAM D21 Family
Schematic Checklist
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 1173