Datasheet

15. GCLK - Generic Clock Controller
15.1 Overview
Depending on the application, peripherals may require specific clock frequencies to operate correctly. The
Generic Clock controller GCLK provides nine Generic Clock Generators that can provide a wide range of
clock frequencies.
Generators can be set to use different external and internal oscillators as source. The clock of each
Generator can be divided. The outputs from the Generators are used as sources for the Generic Clock
Multiplexers, which provide the Generic Clock (GCLK_PERIPHERAL) to the peripheral modules, as
shown in Generic Clock Controller Block Diagram. The number of Peripheral Clocks depends on how
many peripherals the device has.
Note: The Generator 0 is always the direct source of the GCLK_MAIN signal.
15.2 Features
• Provides Generic Clocks
• Wide frequency range
• Clock source for the generator can be changed on the fly
15.3 Block Diagram
The generation of Peripheral Clock signals (GCLK_PERIPHERAL) and the Main Clock (GCLK_MAIN)
can be seen in the figure below.
Figure 15-1. Device Clocking Diagram
Generic Clock Generator
OSC8M
OSC32K
OSCULP32K
XOSC32K
SYSCTRL
Clock
Divider &
Masker
Clock
Gate
Generic Clock Multiplexer
GCLK_PERIPHERAL
PERIPHERALS
GENERIC CLOCK CONTROLLER
PM
GCLK_MAIN
DFLL48M
XOSC
GCLK_IO
The GCLK block diagram is shown in the next figure.
SAM D21 Family
GCLK - Generic Clock Controller
© 2018 Microchip Technology Inc.
Datasheet Complete
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