Datasheet

...........continued
Symbol Parameter Conditions Min. Typ. Max. Units
DNL Differential Non-Linearity 1x gain +/-0.5 +/-0.6 +/-0.95 LSB
- Gain Error Ext. Ref. 1x -10 0.7 10 mV
- Gain Accuracy
(4)
Ext. Ref. 0.5x +/-0.1 +/-0.3 +/-0.4 %
Ext. Ref. 2x to 16X +/-0.01 +/-0.1 +/-0,65 %
- Offset Error Ext. Ref. 1x -17 0.2 1 mV
SFDR Spurious Free Dynamic Range 1x Gain
F
IN
= 40kHz
A
IN
= 95%FSR
63 65 66.5 dB
SINAD Signal-to-Noise and Distortion 50.7 59.5 61 dB
SNR Signal-to-Noise Ratio 57.6 60 64 dB
THD Total Harmonic Distortion -64.4 -63 -57.9 dB
- Noise RMS T = 25°C - 1 - mV
Table 40-29. Single Ended Mode FCLK_ADC = 2.1MHz (Device Variant B and D)
Symbol Parameter Conditions Min. Typ. Max. Units
ENOB Effective Number of Bits With gain compensation - 9.5 10.1 Bits
TUE Total Unadjusted Error 1x gain - 7.8 40 LSB
INL Integral Non-Linearity 1x gain 1.4 2.6 6 LSB
DNL Differential Non-Linearity 1x gain +/-0.6 +/-0.7 +/-0.95 LSB
GE Gain Error Ext. Ref. 1x -6.6 0.6 6.6 mV
Gain Accuracy
(4)
Ext. Ref. 0.5x +/-0.1 +/-0.37 +/-0.55 %
Ext. Ref. 2x to 16X +/-0.01 +/-0.1 +/-0.3 %
OE Offset Error Ext. Ref. 1x -5 3.2 12 mV
SFDR Spurious Free Dynamic Range 1x Gain
F
IN
= 40kHz
A
IN
= 95%FSR
61.7 66.6 66.6 dB
SINAD Signal-to-Noise and Distortion 53.9 58.8 60.7 dB
SNR Signal-to-Noise Ratio 52.9 59.7 62.7 dB
THD Total Harmonic Distortion -67.6 -66.6 -63.7 dB
- Noise RMS T = 25°C - 1 6 mV
Note:
1. Maximum numbers are based on characterization and not tested in production, and for 5% to 95%
of the input voltage range.
2. Respect the input common mode voltage through the following equations (where V
CM_IN
is the
Input channel common mode voltage) for all V
IN
:
– VCM_IN < 0.7*VDDANA + VREF/4 – 0.75V
– VCM_IN > VREF/4 – 0.3*VDDANA - 0.1V
SAM D21 Family
AEC-Q100 125°C Specifications
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 1119