Datasheet

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Symbol Parameter Conditions Min. Typ. Max. Units
GE Gain Error Ext. Ref 1x -15 -2.4 15 mV
V
REF
=V
DDANA
/1.48 -56 -14 56 mV
Bandgap -36 -7 36 mV
Gain Accuracy
(5)
Ext. Ref. 0.5x - +/-0.1 +/-0.7 %
Ext. Ref. 2x to 16x - +/-0.04 +/-0.5 %
OE Offset Error Ext. Ref. 1x -8 1.7 8 mV
V
REF
=V
DDANA
/1.48 -8 1.6 9 mV
Bandgap -6 1.8 8 mV
SFDR Spurious Free Dynamic Range 1x Gain
F
IN
= 40kHz
A
IN
= 95%FSR
63.7 69.5 71.5 dB
SINAD Signal-to-Noise and Distortion 56.8 63.7 65.6 dB
SNR Signal-to-Noise Ratio 58.8 64.6 66.6 dB
THD Total Harmonic Distortion -71.5 -69.5 -65.6 dB
Noise RMS T=25°C - 1 2.5 mV
Note:
1. Maximum numbers are based on characterization and not tested in production, and valid for 5% to
95% of the input voltage range.
2. Dynamic parameter numbers are based on characterization and not tested in production.
3. Respect the input common mode voltage through the following equations (where VCM_IN is the
Input channel common mode voltage):
– 1.1. If |VIN| > VREF/4
– VCM_IN < 0.95*VDDANA + VREF/4 – 0.75V
– VCM_IN > VREF/4 -0.05*VDDANA -0.1V
1.2. If |VIN| < VREF/4
– VCM_IN < 1.2*VDDANA - 0.75V
– VCM_IN > 0.2*VDDANA - 0.1V
4. The ADC channels on pins PA08, PA09, PA10, and PA11 are powered from the V
DDIO
power
supply. The ADC performance of these pins will not be the same as all the other ADC channels on
pins powered from the V
DDANA
power supply.
5. The gain accuracy represents the gain error expressed in percent. Gain accuracy (%) = (Gain Error
in V x 100) / (2*V
REF
/GAIN).
Table 40-28. Single Ended Mode FCLK_ADC = 2.1MHz (Device Variant A)
Symbol Parameter Conditions Min. Typ. Max. Units
ENOB Effective Number of Bits With gain compensation - 9.5 9.8 Bits
TUE Total Unadjusted Error 1x gain - 8.4 14.7 LSB
INL Integral Non-Linearity 1x gain 1.6 2.6 7.5 LSB
SAM D21 Family
AEC-Q100 125°C Specifications
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 1118