Datasheet

40. AEC-Q100 125°C Specifications
40.1 Disclaimer
All typical values are measured at T = 25°C unless otherwise specified. All minimum and maximum
values are valid across operating temperature and voltage unless otherwise specified.
40.2 Thermal Considerations
40.2.1 Thermal Resistance Data
The following Table summarizes the thermal resistance data depending on the package.
Table 40-1. Thermal Resistance Data
Package Type θ
JA
θ
JC
32-pin QFN (Wettable Flanks) 40.5°C/W 16.0°C/W
48-pin QFN (Wettable Flanks) 31.9°C/W 11.7°C/W
64-pin QFN (Wettable Flanks) 32.5°C/W 11.3°C/W
32-pin TQFP 64.7°C/W 23.1°C/W
48-pin TQFP 63.6°C/W 12.2°C/W
64-pin TQFP 60.9°C/W 12.2°C/W
40.2.2 Junction Temperature
The average chip-junction temperature, T
J
, in °C can be obtained from the following:
1. T
J
= T
A
+ (P
D
x θ
JA
)
2. T
J
= T
A
+ (P
D
x (θ
HEATSINK
+ θ
JC
))
where:
• θ
JA
= Package thermal resistance, Junction-to-ambient (°C/W), see Thermal Resistance Data
• θ
JC
= Package thermal resistance, Junction-to-case thermal resistance (°C/W), see Thermal
Resistance Data
• θ
HEATSINK
= Thermal resistance (°C/W) specification of the external cooling device
• P
D
= Device power consumption (W)
• T
A
= Ambient temperature (°C)
From the first equation, the user can derive the estimated lifetime of the chip and decide if a cooling
device is necessary or not. If a cooling device has to be fitted on the chip, the second equation should be
used to compute the resulting average chip-junction temperature T
J
in °C.
40.3 Absolute Maximum Ratings
Stresses beyond those listed in the table below may cause permanent damage to the device. This is a
stress rating only, and functional operation of the device at these or other conditions beyond those
SAM D21 Family
AEC-Q100 125°C Specifications
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 1099