Datasheet

...........continued
Symbol Description Max. Units
f
GCLK_EVSYS_CHANNEL_8
EVSYS channel 8 input clock frequency 48 MHz
f
GCLK_EVSYS_CHANNEL_9
EVSYS channel 9 input clock frequency 48 MHz
f
GCLK_EVSYS_CHANNEL_10
EVSYS channel 10 input clock frequency 48 MHz
f
GCLK_EVSYS_CHANNEL_11
EVSYS channel 11 input clock frequency 48 MHz
f
GCLK_SERCOMx_SLOW
Common SERCOM slow input clock frequency 48 MHz
f
GCLK_SERCOM0_CORE
SERCOM0 input clock frequency 48 MHz
f
GCLK_SERCOM1_CORE
SERCOM1 input clock frequency 48 MHz
f
GCLK_SERCOM2_CORE
SERCOM2 input clock frequency 48 MHz
f
GCLK_SERCOM3_CORE
SERCOM3 input clock frequency 48 MHz
f
GCLK_SERCOM4_CORE
SERCOM4 input clock frequency 48 MHz
f
GCLK_SERCOM5_CORE
SERCOM5 input clock frequency 48 MHz
f
GCLK_TCC0
, f
GCLK_TCC1
TCC0, TCC1 input clock frequency 96 MHz
f
GCLK_TCC2
, f
GCLK_TCC3
, f
GCLK_TC3
TCC2, TCC3,TC3 input clock frequency 96 MHz
f
GCLK_TC4
, f
GCLK_TC5
TC4, TC5 input clock frequency 48 MHz
f
GCLK_TC6
, f
GCLK_TC7
TC6, TC7 input clock frequency 48 MHz
f
GCLK_ADC
ADC input clock frequency 48 MHz
f
GCLK_AC_DIG
AC digital input clock frequency 48 MHz
f
GCLK_AC_ANA
AC analog input clock frequency 64 KHz
f
GCLK_AC1_DIG
AC1 digital input clock frequency 48 MHz
f
GCLK_AC1_ANA
AC1 analog input clock frequency 64 KHz
f
GCLK_DAC
DAC input clock frequency 350 KHz
f
GCLK_PTC
PTC input clock frequency 48 MHz
f
GCLK_I2S_0
I2S serializer 0 input clock frequency 13 MHz
f
GCLK_I2S_1
I2S serializer 1 input clock frequency 13 MHz
39.5 Power Consumption
The values in this section are measured values of power consumption under the following conditions,
except where noted:
• Operating conditions
– V
VDDIN
= 3.3 V
• Wake up time from sleep mode is measured from the edge of the wakeup signal to the execution of
the first instruction fetched in flash.
• Oscillators
SAM D21 Family
Electrical Characteristics at 125°C
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 1069