Datasheet

Figure 38-3. ADC Input
R
SOURCE
R
SAMPLE
Analog Input
AINx
C
SAMPLE
V
IN
VDDANA/2
To achieve n bits of accuracy, the 
SAMPLE
capacitor must be charged at least to a voltage of

CSAMPLE
 
IN
× 1  2
  + 1
The minimum sampling time 
SAMPLEHOLD
for a given 
SOURCE
can be found using this formula:

SAMPLEHOLD
 
SAMPLE
+ 
SOURCE
× 
SAMPLE
×  + 1 × ln 2
for a 12 bits accuracy:

SAMPLEHOLD
 
SAMPLE
+ 
SOURCE
× 
SAMPLE
× 9.02
where

SAMPLEHOLD
=
1
2 × 
ADC
38.6.4 Digital to Analog Converter (DAC) Characteristics
Table 38-15. Operating Conditions
Symbol Parameter Conditions Min. Typ. Max. Units
V
DDANA
Analog supply voltage 1.62 - 3.63 V
AV
REF
External reference voltage 1.0 - V
DDANA
-0.6 V
Internal reference voltage 1 - 1 - V
Internal reference voltage 2 - V
DDANA
- V
I Linear output voltage range 0.05 - V
DDANA
-0.05 V
I Minimum resistive load 5 - - kΩ
I Maximum capacitance load - - 100 pF
I
DD
DC supply current
(2)
Voltage pump disabled - 160 245 μA
1. These values are based on specifications otherwise noted.
2. These values are based on characterization. These values are not covered by test limits in
production.
SAM D21 Family
Electrical Characteristics at 105°C
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 1054