Datasheet

...........continued
Name Description Mode VDD=1.8V VDD=3.3V Units
Min. Typ. Max. Min. Typ. Max.
t
M_FSOH
FS hold time Master mode -0.1 -0.1 ns
t
S_FSIS
FS setup time Slave mode 6 5.3 ns
t
S_FSIH
FS hold time Slave mode 0 0 ns
t
M_SDIS
Data input setup time Master mode 36 25.9 ns
t
M_SDIH
Data input hold time Master mode -8.2 -8.2 ns
t
S_SDIS
Data input setup time Slave mode 9.1 8.3 ns
t
S_SDIH
Data input hold time Slave mode 3.8 3.7 ns
t
M_SDOV
Data output valid time Master transmitter 2.5 1.9 ns
t
M_SDOH
Data output hold time Master transmitter -0.1 -0.1 ns
t
S_SDOV
Data output valid time Slave transmitter 29.8 19.7 ns
t
S_SDOH
Data output hold time Slave transmitter 29.1 18.9 ns
t
PDM2LS
Data input setup time Master mode PDM2
Left
35.5 25.3 ns
t
PDM2LH
Data input hold time Master mode PDM2
Left
-8.2 -8.2 ns
t
PDM2RS
Data input setup time Master mode PDM2
Right
30.6 21.1 ns
t
PDM2RH
Data input hold time Master mode PDM2
Right
-7 -7 ns
1. All timing characteristics given for 15pF capacitive load.
2. These values are based on simulations and not covered by test limits in production.
3. See 37.9 I/O Pin Characteristics
SAM D21 Family
Electrical Characteristics
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 1041