Datasheet

37.16.2 SERCOM in SPI Mode Timing
Figure 37-20. SPI Timing Requirements in Master Mode
MSB LSB
BSLBSM
t
MOS
t
MIS
t
MIH
t
SCKW
t
SCK
t
MOH
t
MOH
t
SCKF
t
SCKR
t
SCKW
MOSI
(Data Output)
MISO
(Data Input)
SCK
(CPOL = 1)
SCK
(CPOL = 0)
SS
Figure 37-21. SPI Timing Requirements in Slave Mode
MSB
LSB
BSLBSM
t
SIS
t
SIH
t
SSCKW
t
SSCKW
t
SSCK
t
SSH
t
SOSSH
t
SCKR
t
SCKF
t
SOS
t
SSS
t
SOSSS
MISO
(Data Output)
MO
SI
(Data Input)
SCK
(CPOL = 1)
SCK
(CPOL = 0)
SS
SAM D21 Family
Electrical Characteristics
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 1033