Datasheet

87
SAM3X / SAM3A [DATASHEET]
Atmel-11057C-ATARM-SAM3X-SAM3A-Datasheet_23-Mar-15
produced by shifting an 8-bit value. These instructions do not affect the carry flag if Operand2 is any other
constant.
10.11.3.2 Instruction substitution
Your assembler might be able to produce an equivalent instruction in cases where you specify a constant that is
not permitted. For example, an assembler might assemble the instruction CMP
Rd , #0xFFFFFFFE as the
equivalent instruction CMN Rd, #0x2.
10.11.3.3 Register with optional shift
You specify an Operand2 register in the form:
Rm {, shift}
where:
Rm is the register holding the data for the second operand.
shift is an optional shift to be applied to Rm. It can be one of:
ASR #n arithmetic shift right n bits, 1 ≤ n ≤ 32.
LSL #n logical shift left n bits, 1 ≤ n ≤ 31.
LSR #n logical shift right n bits, 1 ≤ n ≤ 32.
ROR #n rotate right n bits, 1 ≤ n ≤ 31.
RRX rotate right one bit, with extend.
- if omitted, no shift occurs, equivalent to LSL #0.
If you omit the shift, or specify LSL #0, the instruction uses the value in Rm.
If you specify a shift, the shift is applied to the value in Rm, and the resulting 32-bit value is used by the instruction.
However, the contents in the register Rm remains unchanged. Specifying a register with shift also updates the
carry flag when used with certain instructions. For information on the shift operations and how they affect the carry
flag, see “Shift Operations”
10.11.4 Shift Operations
Register shift operations move the bits in a register left or right by a specified number of bits, the shift length.
Register shift can be performed:
 directly by the instructions ASR, LSR, LSL, ROR, and RRX, and the result is written to a destination register
 during the calculation of Operand2 by the instructions that specify the second operand as a register with
shift, see “Flexible second operand” on page 86. The result is used by the instruction.
The permitted shift lengths depend on the shift type and the instruction, see the individual instruction description or
“Flexible second operand” on page 86. If the shift length is 0, no shift occurs. Register shift operations update the
carry flag except when the specified shift length is 0. The following sub-sections describe the various shift
operations and how they affect the carry flag. In these descriptions, Rm is the register containing the value to be
shifted, and n is the shift length.