Datasheet

859
SAM3X / SAM3A [DATASHEET]
Atmel-11057C-ATARM-SAM3X-SAM3A-Datasheet_23-Mar-15
36.5.2 Power Management
The TC is clocked through the Power Management Controller (PMC), thus the programmer must first configure the
PMC to enable the Timer Counter clock.
36.5.3 Interrupt Sources
The TC has an interrupt line connected to the interrupt controller. Handling the TC interrupt requires programming
the interrupt controller before configuring the TC.
36.5.4 Fault Output
The TC has the FAULT output internally connected to the fault input of PWM. Refer to Section 36.6.16 ”Fault
Mode”, and to the implementation of the Pulse Width Modulation (PWM) in this product.
TC1 TIOA4 PB2 B
TC1 TIOA4 PE11 A
TC1 TIOA5 PB4 B
TC1 TIOA5 PE13 A
TC1 TIOB3 PB1 B
TC1 TIOB3 PE10 A
TC1 TIOB4 PB3 B
TC1 TIOB4 PE12 A
TC1 TIOB5 PB5 B
TC1 TIOB5 PE14 A
TC2 TCLK6 PC27 B
TC2 TCLK7 PC30 B
TC2 TCLK8 PD9 B
TC2 TIOA6 PC25 B
TC2 TIOA7 PC28 B
TC2 TIOA8 PD7 B
TC2 TIOB6 PC26 B
TC2 TIOB7 PC29 B
TC2 TIOB8 PD8 B
Table 36-4. I/O Lines (Continued)
Instance Signal I/O Line Peripheral
Table 36-5. Peripheral IDs
Instance ID
TC0 27
TC1 28
TC2 29