Datasheet

SAM3X / SAM3A [DATASHEET]
Atmel-11057C-ATARM-SAM3X-SAM3A-Datasheet_23-Mar-15
80
10.8 Power management
The Cortex-M3 processor sleep modes reduce power consumption:
 Backup Mode
 Wait Mode
 Sleep Mode
The SLEEPDEEP bit of the SCR selects which sleep mode is used, see “System Control Register” on page 174.
For more information about the behavior of the sleep modes see “Low Power Modes” in the PMC section of the
datasheet.
This section describes the mechanisms for entering sleep mode, and the conditions for waking up from sleep
mode.
10.8.1 Entering sleep mode
This section describes the mechanisms software can use to put the processor into sleep mode.
The system can generate spurious wakeup events, for example a debug operation wakes up the processor.
Therefore software must be able to put the processor back into sleep mode after such an event. A program might
have an idle loop to put the processor back to sleep mode.
10.8.1.1 Wait for interrupt
The wait for interrupt instruction, WFI, causes immediate entry to sleep mode. When the processor executes a
WFI instruction it stops executing instructions and enters sleep mode. See “WFI” on page 151 for more
information.
10.8.1.2 Wait for event
The wait for event instruction, WFE, causes entry to sleep mode conditional on the value of an one-bit event
register. When the processor executes a WFE instruction, it checks this register:
 if the register is 0 the processor stops executing instructions and enters sleep mode
 if the register is 1 the processor clears the register to 0 and continues executing instructions without entering
sleep mode.
See “WFE” on page 150 for more information.
10.8.1.3 Sleep-on-exit
If the SLEEPONEXIT bit of the SCR is set to 1, when the processor completes the execution of an exception
handler it returns to Thread mode and immediately enters sleep mode. Use this mechanism in applications that
only require the processor to run when an exception occurs.
10.8.2 Wakeup from sleep mode
The conditions for the processor to wakeup depend on the mechanism that cause it to enter sleep mode.
10.8.2.1 Wakeup from WFI or sleep-on-exit
Normally, the processor wakes up only when it detects an exception with sufficient priority to cause exception
entry.
Some embedded systems might have to execute system restore tasks after the processor wakes up, and before it
executes an interrupt handler. To achieve this set the PRIMASK bit to 1 and the FAULTMASK bit to 0. If an
interrupt arrives that is enabled and has a higher priority than current exception priority, the processor wakes up
but does not execute the interrupt handler until the processor sets PRIMASK to zero. For more information about
PRIMASK and FAULTMASK see “Exception mask registers” on page 56.