Datasheet

SAM3X / SAM3A [DATASHEET]
Atmel-11057C-ATARM-SAM3X-SAM3A-Datasheet_23-Mar-15
784
Figure 35-10. Start Frame Delimiter
Drift Compensation
Drift compensation is available only in 16X oversampling mode. An hardware recovery system allows a larger
clock drift. To enable the hardware system, the bit in the USART_MAN register must be set. If the RXD edge is
one 16X clock cycle from the expected edge, this is considered as normal jitter and no corrective actions is taken.
If the RXD event is between 4 and 2 clock cycles before the expected edge, then the current period is shortened
by one clock cycle. If the RXD event is between 2 and 3 clock cycles after the expected edge, then the current
period is lengthened by one clock cycle. These intervals are considered to be drift and so corrective actions are
automatically taken.
Figure 35-11. Bit Resynchronization
Manchester
encoded
data
Txd
SFD
DATA
One bit start frame delimiter
Preamble Length
is set to 0
Manchester
encoded
data
Txd
SFD
DATA
Command Sync
start frame delimiter
Manchester
encoded
data
Txd
SFD
DATA
Data Sync
start frame delimiter
RXD
Oversampling
16x Clock
Sampling
point
Expected edge
Tolerance
Synchro.
Jump
Sync
Jump
Synchro.
Error
Synchro.
Error