Datasheet

751
SAM3X / SAM3A [DATASHEET]
Atmel-11057C-ATARM-SAM3X-SAM3A-Datasheet_23-Mar-15
34.3 Block Diagram
Figure 34-1. UART Functional Block Diagram
34.4 Product Dependencies
34.4.1 I/O Lines
The UART pins are multiplexed with PIO lines. The programmer must first configure the corresponding PIO
Controller to enable I/O line operations of the UART.
34.4.2 Power Management
The UART clock is controllable through the Power Management Controller. In this case, the programmer must first
configure the PMC to enable the UART clock. Usually, the peripheral identifier used for this purpose is 1.
34.4.3 Interrupt Source
The UART interrupt line is connected to one of the interrupt sources of the Nested Vectored Interrupt Controller
(NVIC). Interrupt handling requires programming of the NVIC before configuring the UART.
Peripheral DMA Controller
Baud Rate
Generator
Transmit
Receive
Interrupt
Control
Peripheral
Bridge
Parallel
Input/
Output
UTXD
URXD
Power
Management
Controller
MCK
uart_irq
APB
UART
Table 34-1. UART Pin Description
Pin Name Description Type
URXD UART Receive Data Input
UTXD UART Transmit Data Output
Table 34-2. I/O Lines
Instance Signal I/O Line Peripheral
UART URXD PA8 A
UART UTXD PA9 A