Datasheet

679
SAM3X / SAM3A [DATASHEET]
Atmel-11057C-ATARM-SAM3X-SAM3A-Datasheet_23-Mar-15
32.6 Product Dependencies
32.6.1 I/O Lines
The pins used for interfacing the compliant external devices may be multiplexed with PIO lines. The programmer
must first program the PIO controllers to assign the SPI pins to their peripheral functions.
32.6.2 Power Management
The SPI may be clocked through the Power Management Controller (PMC), thus the programmer must first
configure the PMC to enable the SPI clock.
32.6.3 Interrupt
The SPI interface has an interrupt line connected to the Interrupt Controller. Handling the SPI interrupt requires
programming the interrupt controller before configuring the SPI.
Table 32-2. I/O Lines
Instance Signal I/O Line Peripheral
SPI0 SPI0_MISO PA25 A
SPI0 SPI0_MOSI PA26 A
SPI0 SPI0_NPCS0 PA28 A
SPI0 SPI0_NPCS1 PA29 A
SPI0 SPI0_NPCS1 PB20 B
SPI0 SPI0_NPCS2 PA30 A
SPI0 SPI0_NPCS2 PB21 B
SPI0 SPI0_NPCS3 PA31 A
SPI0 SPI0_NPCS3 PB23 B
SPI0 SPI0_SPCK PA27 A
SPI1 SPI1_MISO PE28 A
SPI1 SPI1_MOSI PE29 A
SPI1 SPI1_NPCS0 PE31 A
SPI1 SPI1_NPCS1 PF0 A
SPI1 SPI1_NPCS2 PF1 A
SPI1 SPI1_NPCS3 PF2 A
SPI1 SPI1_SPCK PE30 A
Table 32-3. Peripheral IDs
Instance ID
SPI0 24
SPI1 25