Datasheet

SAM3X / SAM3A [DATASHEET]
Atmel-11057C-ATARM-SAM3X-SAM3A-Datasheet_23-Mar-15
580
Figure 30-7. Receiver Clock Management
30.7.1.4 Serial Clock Ratio Considerations
The Transmitter and the Receiver can be programmed to operate with the clock signals provided on either the TK
or RK pins. This allows the SSC to support many slave-mode data transfers. In this case, the maximum clock
speed allowed on the RK pin is:
 Master Clock divided by 2 if Receiver Frame Synchro is input
 Master Clock divided by 3 if Receiver Frame Synchro is output
In addition, the maximum clock speed allowed on the TK pin is:
 Master Clock divided by 6 if Transmit Frame Synchro is input
 Master Clock divided by 2 if Transmit Frame Synchro is output
RK (pin)
Transmitter
Clock
Divider
Clock
CKS
CKO
Data Transfer
CKI
CKG
Receiver
Clock
Clock
Output
MUX
Tr i- state
Controller
Tr i- state
Controller
INV
MUX