Datasheet

SAM3X / SAM3A [DATASHEET]
Atmel-11057C-ATARM-SAM3X-SAM3A-Datasheet_23-Mar-15
566
28.15.26 PMC Peripheral Control Register
Name: PMC_PCR
Address: 0x400E070C
Access: Read-write
• PID: Peripheral ID
Peripheral ID selection from PID2 to PID63
PID2 to PID63 refer to identifiers as defined in the section “Peripheral Identifiers” in the product datasheet.
Not all PID can be configured with divided clock.
Only the following PID can be configured with divided clock: CAN0, CAN1.
•CMD: Command
0 = Read mode.
1 = Write mode.
• DIV: Divisor Value
DIV must not be changed while peripheral is in use or when the peripheral clock is enabled.
To change the clock division factor (DIV) of a peripheral, its clock must first be disabled by writing either EN to 0 for the cor-
responding PID (DIV must be kept the same if this method is used), or writing to PMC_PCDR register. Then a second write
must be performed into PMC_PCR with the new value of DIV and a third write must be performed to enable the peripheral
clock (either by using PMC_PCR or PMC_PCER register).
• EN: Enable
0 = Selected Peripheral clock is disabled.
1 = Selected Peripheral clock is enabled.
31 302928 27 26 25 24
–––EN––––
23 22 21 20 19 18 17 16
––––––
DIV
15 14 13 12 11 10 9 8
–––
CMD
––––
76543 210
––
PID
Value Name Description
0 PERIPH_DIV_MCK Peripheral clock is MCK
1 PERIPH_DIV2_MCK Peripheral clock is MCK/2
2 PERIPH_DIV4_MCK Peripheral clock is MCK/4