Datasheet

563
SAM3X / SAM3A [DATASHEET]
Atmel-11057C-ATARM-SAM3X-SAM3A-Datasheet_23-Mar-15
28.15.23 PMC Peripheral Clock Enable Register 1
Name: PMC_PCER1
Address: 0x400E0700
Access: Write-only
This register can only be written if the WPEN bit is cleared in “PMC Write Protect Mode Register” .
• PIDx: Peripheral Clock x Enable
0 = No effect.
1 = Enables the corresponding peripheral clock.
Notes: 1. To get PIDx, refer to identifiers as defined in the section “Peripheral Identifiers” in the product datasheet.
2. Programming the control bits of the Peripheral ID that are not implemented has no effect on the behavior of the PMC.
31 302928 27 26 25 24
––––––––
23 22 21 20 19 18 17 16
––––––––
15 14 13 12 11 10 9 8
–––PID44PID43 PID42 PID41 PID40
76543 210
PID39PID38 PID37PID36PID35PID34PID33 PID32