Datasheet

SAM3X / SAM3A [DATASHEET]
Atmel-11057C-ATARM-SAM3X-SAM3A-Datasheet_23-Mar-15
542
28.15.4 PMC Peripheral Clock Enable Register 0
Name: PMC_PCER0
Address: 0x400E0610
Access: Write-only
This register can only be written if the WPEN bit is cleared in “PMC Write Protect Mode Register” .
• PIDx: Peripheral Clock x Enable
0 = No effect.
1 = Enables the corresponding peripheral clock.
Note: To get PIDx, refer to identifiers as defined in the section “Peripheral Identifiers” in the product datasheet. Other peripherals can be
enabled in PMC_PCER1 (Section 28.15.23 ”PMC Peripheral Clock Enable Register 1”).
Note: Programming the control bits of the Peripheral ID that are not implemented has no effect on the behavior of the PMC.
31 302928 27 26 25 24
PID31PID30PID29PID28 PID27 PID26 PID25 PID24
23 22 21 20 19 18 17 16
PID23 PID22 PID21 PID20 PID19 PID18 PID17 PID16
15 14 13 12 11 10 9 8
PID15 PID14 PID13 PID12 PID11 PID10 PID9 PID8
76543 210
PID7 PID6 PID5 PID4 PID3 PID2 – –