Datasheet

527
SAM3X / SAM3A [DATASHEET]
Atmel-11057C-ATARM-SAM3X-SAM3A-Datasheet_23-Mar-15
28.3 Block Diagram
Figure 28-1. General Clock Block Diagram
Figure 28-2. Peripheral Clock Divider Block Diagram
Power
Management
Controller
Main Clock
MAINCK
PLLA Clock
PLLACK
ControlStatus
3-20 MHz
Crystal
or
Ceramic
Resonator
Oscillator
MOSCSEL
Clock Generator
PLLA and
Divider /2
XIN
XOUT
XIN32
XOUT32
Slow Clock
SLCK
XTALSEL
(Supply Controller)
Embedded
32 kHz RC
Oscillator
32768 Hz
Crystal
Oscillator
UPLL Clock
UPLLCK
0
1
0
1
MCK
periph_clk[..]
int
SLCK
MAINCK
PLLACK
Prescaler
/1,/2,/3,/4,/8,
/16,/32,/64
HCLK
Processor
Clock
Controller
Sleep Mode
Master Clock Controller
(PMC_MCKR)
Peripherals
Clock Controller
(PMC_PCERx)
ON/OFF
USB FS Clock
Prescaler
/1,/2,/4,/8,
/16,/32,/64
pck[..]
ON/OFF
FCLK
SysTick
Divider
/8
SLCK
MAINCK
PLLACK
UPLLCK/2
Processor clock
Free running clock
Master clock
USB UTMI
PLL
Embedded
4/8/12 MHz
Fast
RC Oscillator
Programmable Clock Controller
(PMC_PCKx)
PRES
PLLADIV2
PRESCSS
CSS
Divider
/1, /2
USB_48M
UPLLDIV
Divider
/1,/2,/3,...,/16
USB Clock Controller (PMC_USB)
USBDIVUSBS
ON/OFF
UPLLCK/2
USB_480M
USB HS Clock
PLLACK
UPLLCK/2
MCK
MCK
periph_clk[n]
int
SLCK
MAINCK
PLLACK
Prescaler
/1,/2,/3,/4,/8,
/16,/32,/64
HCLK
Processor
Clock
Controller
Sleep Mode
Master Clock Controller
(PMC_MCKR)
Peripherals
Clock Controller
(PMC_PCERx)
PLLBCK
Processor clockc
Master clock
PRESCSS
ON/OFF
ON/OFF
ON/OFF
periph_clk[n+1]
periph_clk[n+2]
Peripherals
Control Register
(PMC_PCR)
DIV(PID = n+1)
DIV(PID = n+2)
Divider
/2, /4
MCK
MCK
div4
div2
div4
div2
div4
div2